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@@ -84,7 +84,7 @@ - Used for any number of operations that generate a result based on two inputs - Operands (A and B) and a "command" - We've already seen this for subtraction -- Output is either a computation ro a comparison result +- Output is either a computation or a comparison result - For comparison type command, output is 1 for true, 0 for false (it's a yes/no question) ### Example ALU @@ -95,7 +95,7 @@ - 01 means subtract - 11 means "set on less than" - i.e. "true or false: A is less than B" -- Not that we're not using the encoding 10 just yet +- Note that we're not using the encoding 10 just yet - You'll be filling this in as a homework problem ### Example ALU block diagram @@ -110,7 +110,7 @@ - Assumes that the decode of F1 and F0 will cause Subtract to be asserted - Define a signal called LT (for Less Than) to tell us "yes, A is less than B" -- Using Sum and OVF, when whould LT be true? How do we know A-B<0? +- Using Sum and OVF, when would LT be true? How do we know A-B<0? |S3 OVF|LT| |------|--| @@ -143,3 +143,7 @@ - T/F = True/False  + +--- + +[Latches ->](12.md) diff --git a/12.1.png b/12.1.png Binary files differnew file mode 100644 index 0000000..94478ad --- /dev/null +++ b/12.1.png diff --git a/12.2.png b/12.2.png Binary files differnew file mode 100644 index 0000000..d8019f8 --- /dev/null +++ b/12.2.png diff --git a/12.3.png b/12.3.png Binary files differnew file mode 100644 index 0000000..061bfca --- /dev/null +++ b/12.3.png diff --git a/12.4.png b/12.4.png Binary files differnew file mode 100644 index 0000000..62994c7 --- /dev/null +++ b/12.4.png diff --git a/12.5.png b/12.5.png Binary files differnew file mode 100644 index 0000000..5a47156 --- /dev/null +++ b/12.5.png diff --git a/12.6.png b/12.6.png Binary files differnew file mode 100644 index 0000000..4d84b12 --- /dev/null +++ b/12.6.png diff --git a/12.7.png b/12.7.png Binary files differnew file mode 100644 index 0000000..aa2db9d --- /dev/null +++ b/12.7.png diff --git a/12.8.png b/12.8.png Binary files differnew file mode 100644 index 0000000..bcd1b55 --- /dev/null +++ b/12.8.png diff --git a/12.9.png b/12.9.png Binary files differnew file mode 100644 index 0000000..922e88d --- /dev/null +++ b/12.9.png @@ -0,0 +1,76 @@ +[\<- Overflow, comparison, and the design of an ALU](11.md) + +--- + +# Latches + +## A circuit that remembers + +### Sequential Circuits + +- Circuits that have "memory" + - A subset of the inputs control whether the output is "allowed" to change + - Otherwise the output will hold its "state" +- In the circuit below, we want On to assert when Set asserts, and to stay asserted even if Set goes back to 0; Reset will clear + + + +### Inverters in a feeback loop + +- Wires will hold onto value forever => memory + + + +- But how to get a value onto one of the wires? + +### Controlling the feedback loop + +- The control signal affects the output + - If control = 0, NOR gate acts like an inverter + - If control = 1, output is 0 + + + +--- + +## The SR latch + +- Qa is primary output (Qb is the inverse) + - (S)et Qa to 1, or (R)eset to 0 + + + +--- + +## Synchronizing with a clock signal + +### Using sequential circuits + +- A latch can hold one bit of info (state) +- Typically we want to hold onto multiple bits of info + - A counter is a typical example +- A 2-bit counter cycles thru 00, 01, 10, 11, then back to 00, 01, etc. +- Generally we want the two bits to change at the same time + - How to do this? + +### Using a Clock for Control + +- Most designs use a clock to "synchronize" when the sequential elements can change state +- In the circuit below, the output can only be changed when Clk "enables" S and R + + + +### Use a D input instead of SR + +- If S and R happen to assert at the same time, the output becomes a function of which deasserts last + - This may be unknown or unintentional +- Don't really need both S and R + - If we're trying to change the output, we generally know if it should be 0 or 1 +- Define a single input, D, that is passed to the output + +### D Latch + + + + + @@ -9,7 +9,7 @@ - Enable: allow the other input to pass thru - `X*1` = `X` - `X+0` = `X` -- Disable:` ma`ke the other input irrelevant +- Disable: make the other input irrelevant - `X*0` = `0` - `X+1` = `1` |
