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+[\<- State machine concepts](18.md)
+
+---
+
+# Multiple control outputs
+
+## Background on register swap problem
+
+### Datapath and control
+
+- We've learned about muxes and registers as datapath elements
+- Mux selects and load enables are control signals that determine how datapath is used
+- If these control signals need to be sequenced across multiple cycles, a state machine is the typical way to do this
+
+### Example 2: Register Swap
+
+- Swap the contents of R1 and R2
+- Can't be done in a single cycle
+- Use R3 as temporary holding register
+
+![diagram](19.1.png)
+
+### Another view of the datapath
+
+- To make the control signals more clear
+
+![diagram](19.2.png)
+
+---
+
+## State diagram
+
+### Sequence
+
+- Since there's a single bus, can only copy/move one value at a time
+	- Copy the value in R2 into R3
+		- Select R2 to drive the bus and assert R3's enable
+	- Copy the value in R1 into R2
+		- Select R1 to drive the bus and assert R2's enable
+	- Copy the value in R3 into R1
+		- Select R3 to drive the bus and assert R1's enable
+- Each of these steps is a different state in a state machine
+
+![diagram](19.3.png)
+
+---
+
+## State table and implementation
+
+### State Table & Assignment
+
+![diagram](19.4.png)
+
+### Visually deriving equations
+
+- Y2 = (stateB) + (stateC)
+	- `= !y2*y2 + y2*!y1 = y2^y1`
+- Y1 = w\*(stateA) + (stateC)
+	- `= w*!y2*!y1 + y2*!y1`
+
+### K-maps for Next State
+
+![diagram](19.5.png)
+
+### Implementation
+
+![diagram](19.6.png)